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CD4027 Datasheet PDF

Part Series:
CD4027 Series
Category:
Flip Flops
Description:
Flip Flop JK-Master-Slave Type Pos-Edge 2Element 16Pin SOIC T/R
Updated Time: 2023/01/13 01:28:05 (UTC + 8)

CD4027 Datasheet PDF Flip Flops

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CD4027BM96 Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
24 MHz
Number of Pins
16 Pin
Supply Voltage (DC)
3.00V (min)
Case/Package
SOIC-16
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CD4027BM96 Function Overview

The CD4027BM96 is a CMOS dual J-K Master-slave Flip-flop useful in performing control, register and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip-flop, changes in the flip-flop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the Set or Reset input. Each flip-flop has provisions for individual J, K, set, reset and clock input signals. Buffered Q and Q\ signals are provided as outputs. This input-output arrangement provides for compatible operation with the RCA-CD4013B dual D-type flip-flop.
Set-reset capability
Static flip-flop operation
Standardized symmetrical output characteristics
100% Tested for quiescent current at 20V
Green product and no Sb/Br
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