● 32-bit ARM Cortex-M4F architecture optimized for small-footprint embedded applications
● 80-MHz operation; 100 DMIPS performance
● Outstanding processing performance combined with fast interrupt handling
● Thumb-2 mixed 16-/32-bit instruction set delivers the high performance expected of a 32-bit ARM core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few kilobytes of memory for microcontroller-class applications
● Single-cycle multiply instruction and hardware divide
● Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined peripheral control
● Unaligned data access, enabling data to be efficiently packed into memory
● IEEE754-compliant single-precision Floating-Point Unit (FPU)
● 16-bit SIMD vector processing unit
● Fast code execution permits slower processor clock or increases sleep mode time
● Harvard architecture characterized by separate buses for instruction and data
● Efficient processor core, system and memories
● Hardware division and fast digital-signal-processing orientated multiply accumulate
● Saturating arithmetic for signal processing
● Deterministic, high-performance interrupt handling for time-critical applications
● Memory protection unit (MPU) to provide a privileged mode for protected operating system functionality
● Enhanced system debug with extensive breakpoint and trace capabilities
● Serial Wire Debug and Serial Wire Trace reduce the number of pins required for debugging and tracing
● Migration from the ARM7™ processor family for better performance and power efficiency
● Optimized for single-cycle Flash memory usage up to specific frequencies; see “Internal Memory” on page 499 for more information.
● Ultra-low power consumption with integrated sleep modes
Part 3D Model
