TMS320F2811PBKA Datasheet PDF - TI

●The TMS320F2811PBKA is a Digital Signal Processor features high-performance static CMOS technology and peripheral interrupt expansion (PIE) block that supports 45 peripheral interrupts. JTAG boundary scan support IEEE standard 1149.1-1990 IEEE standard test access port and boundary-scan architecture.

● High-performance 32-bit CPU

● Harvard bus architecture

● Atomic operations

● Fast interrupt response and processing

● Unified memory programming model

● 4M Linear program/data address reach

● Code-efficient (in C/C++ and assembly)

● Up to 128K x 16 flash device (four 8K x 16 and six 16K x 16 sectors)

● Up to 128K x 16 ROM

● Boot ROM (4K x 16) - With software boot modes and standard math tables

● Clock and system control - Dynamic PLL ratio changes supported and on-chip oscillator

● Three external interrupts

● Protects Flash/ROM/OTP and L0/L1 SARAM

● Motor control peripherals - Two event managers (EVA, EVB) and compatible to 240xA devices

● Serial peripheral interface (SPI)

● Two serial communications interfaces (SCIs), standard UART

● Enhanced controller area network (eCAN)

● Multichannel buffered serial port (McBSP)

●ESD sensitive device, take proper precaution while handling the device.