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CD4051 Datasheet PDF

Part Series:
CD4051 Series
Category:
Interface ICs
Description:
Multiplexer, 8Channels, 1:8, 3V to 20V, SOIC-16
Updated Time: 2023/01/13 01:22:17 (UTC + 8)

CD4051 Datasheet PDF Interface ICs

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CMOS Single 8Channel Analog Multiplexer/Demultiplexer with Logic-Level Conversion 16-SOIC -55 to 125
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CMOS Single 8Channel Analog Multiplexer/Demultiplexer with Logic-Level Conversion 16-SOIC -55 to 125
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CMOS Single 8Channel Analog Multiplexer/Demultiplexer with Logic-Level Conversion 16-SO -55 to 125
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CMOS Single 8Channel Analog Multiplexer/Demultiplexer with Logic-Level Conversion 16-CDIP -55 to 125
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Single-Ended Multiplexer, 1 Func, 8Channel, CMOS, PDIP16, 0.3INCH, PLASTIC, MS-001, DIP-16
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Analog Multiplexer Single 8:1 16Pin TSSOP T/R

CD4051BM96 Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
16 Pin
Supply Voltage (DC)
3.00V (min)
Operating Voltage
3V ~ 20V
Case/Package
SOIC-16
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CD4051BM96 Function Overview

The CD4051BM96 is a CMOS single 8-channel Analogue Multiplexer/Demultiplexer with logic-level conversion, digitally-controlled analogue switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD - VSS and VDD - VEE supply-voltage ranges, independent of the logic state of the control signals.
3 to 20V Digital,
Low ON resistance, 125R (typical) over 15 VP-P signal input range for VDD - VEE = 18V
High OFF resistance, channel leakage of ±100pA (typical) at VDD - VEE = 18V
Logic-level conversion for digital addressing signals of 3 to 20V (VDD - VSS = 3 to 20V)
Binary address decoding on chip
5, 10 and 15V Parametric ratings
100% Tested for quiescent current at 20V
Maximum input current of 1µA at 18V over full package-temperature range, 100nA at 18V and 25°C
Break-before-make switching eliminates channel overlap
Green product and no Sb/Br
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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