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XC6SLX45 Datasheet PDF

Part Series:
XC6SLX45 Series
Category:
FPGAs
Description:
XILINX XC6SLX45-2FGG484C FPGA, Spartan-6, DCM, PLL, 316 I/O"s, 33MHz, 1.14V to 1.26V, BGA-484
Updated Time: 2023/01/13 02:13:36 (UTC + 8)

XC6SLX45 Datasheet PDF FPGAs

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Field Programmable Gate Array, 3411 CLBs, 862MHz, 43661-Cell, CMOS, PBGA484, 23 X 23MM, 1MM PITCH, LEAD FREE, FBGA-484
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FPGA Spartan®-6 LXT Family 43661 Cells 45nm (CMOS) Technology 1.2V 484Pin CSBGA
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FPGA Spartan®-6 LXT Family 43661 Cells 45nm (CMOS) Technology 1.2V 484Pin CSBGA
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FPGA Spartan®-6 LX Family 43661 Cells 45nm (CMOS) Technology 1.2V 484Pin CSBGA
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FPGA Spartan®-6 LXT Family 43661 Cells 45nm (CMOS) Technology 1.2V 484Pin CSBGA

XC6SLX45-2FGG484C Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
484 Pin
Case/Package
FBGA-484
Number of Positions
484 Position
RAM Memory Size
267263 B
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XC6SLX45-2FGG484C Function Overview

The Xilinx Spartan®-6 FPGA family provide leading system integration capabilities with lowest total cost for high volume applications. It is built on 45nm technology and ideally suited for advanced bridging applications in automotive infotainment, consumer and industrial automation. Spartan®-6 FPGA family comprises two domain optimized subfamilies LX (logic optimized) and LXT (high speed serial connectivity). Spartan®-6 LX FPGAs are optimized for applications that require absolute low cost. They support up to 147K logic cell density, 4.8Mb memory, integrated memory controllers, DSP48A1 slices and high performance integrated IP with support for industry standards. Spartan®-6 LXT FPGAs are optimized to provide the industry"s lowest risk and lowest cost solution for serial connectivity. LXT subfamily extends LX devices by adding up to eight 3.2Gb/s GTP transceivers and an integrated block for PCI Express® compatible endpoint block both derived from proven Virtex® FPGA family technology.
-3, -3N, -2, -1L (LX)/-3, -3N, -2 (LXT) speed grades with 0 to 85°C and -40 to 100°C temperature
Small form factor packaging, MicroBlaze™ soft processor, diverse number of supported I/O protocols
Advanced power management, SelectIO™ interface technology, 18Kb (2 x 9Kb) block RAMs
Spartan®-6 provides increased system performance with up to 8 low power 3.2Gb/s serial transceivers
800Mb/s DDR3 with integrated memory controller, zero power with hibernate power-down mode
BOM cost reduction, clock management tile (CMT) for enhanced performance
Auto detect configuration options and enhanced IP security with AES and device DNA protection
Enabled by ISE® design suite (no cost, front to back FPGA design solution for Linux and Windows)
1.14 to 1.26V (-3, -3N, -2), 0.95 to 1.05V (-1L) internal supply voltage (standard performance)
Lower power 1V core voltage (LX/-1L), high performance 1.2V core voltage (LX, LXT/-2, -3, -3N)
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