74LVC157APW,118 Datasheet PDF - NXP

●The 74LVC157APW is a 2-input Quad Multiplexer which selects four bits of data from two sources under the control of a common select input (S). The four outputs present the selected data in the true (non-inverted) form. The enable input (E\\) is active low. When pin E\ is high, all of the outputs (1Y to 4Y) are forced low regardless of all the other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LVC157A. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. It is useful for implementing highly irregular logic by generating any 4 of the 16 different functions of two variables with one variable common. The device is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to pin S. Inputs can be driven from either 3.3 or 5V devices.

● CMOS low power consumption

● Direct interface with TTL levels