74LVC162245ADGG:11 Datasheet PDF - NXP

●The 74LVC162245ADGG:11 is a 16-bit Transceiver with direction pin and non-inverting 3-state bus compatible outputs in both send and receive directions. Two send/receive (nDIR) inputs control direction and two output enable (nOE) inputs make cascading easy. The nOE inputs control the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. Inputs can be driven from either 3.3/5V devices and when disabled, up to 5.5V can be applied to the outputs. These features allow the use of this device as translator in mixed 3.3 and 5V applications. The 74LVCH162245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. Both HIGH and LOW output stages include 30W series termination resistors to reduce line noise.

● CMOS low power consumption

● Multibyte flow-through standard pin-out architecture

● Low inductance multiple power and ground pins for minimum noise and ground bounce

● Direct interface with TTL levels

● All data inputs have bus hold

● Complies with JEDEC standard

● 5V Tolerant inputs/outputs for interfacing with 5V logic