74LVC3G14DC Datasheet PDF - NXP

●General description

●The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

●Features

●■ Wide supply voltage range from 1.65 V to 5.5 V

●■ 5 V tolerant input/output for interfacing with 5 V logic

●■ High noise immunity

●■ ESD protection:

●◆ HBM JESD22-A114E exceeds 2000 V

●◆ MM JESD22-A115-A exceeds 200 V

●■ ±24 mA output drive (VCC = 3.0 V)

●■ CMOS low power consumption

●■ Latch-up performance exceeds 250 mA

●■ Direct interface with TTL levels

●■ Unlimited rise and fall times

●■ Multiple package options

●■ Specified from −40 °C to +85 °C and −40 °C to +125 °C.

●Applications

●■ Wave and pulse shaper for highly noisy environment

●■ Astable multivibrator

●■ Monostable multivibrator.