●description/ordering information
●This octal bus transceiver is designed for asynchronous communication between data buses. The deviceBtransmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
●To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
●• Controlled Baseline
● − One Assembly/Test Site, One Fabrication Site
●• Extended Temperature Performance of −55°C to 125°C
●• Enhanced Diminishing Manufacturing Sources (DMS) Support
●• Enhanced Product-Change Notification
●• Qualification Pedigree†
●• Typical VOLP (Output Ground Bounce)
● <1 V at VCC = 5 V, TA = 25°C
●• Ioff and Power-Up 3-State Support Hot Insertion
●• High-Drive Outputs (−24-mA IOH, 32-mA IOL)
●• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17
●• ESD Protection Exceeds JESD 22
● − 2000-V Human-Body Model (A114-A)
● − 200-V Machine Model (A115-A)
