●The 12-bit 1.6/1.0 GSPS ADC12D800/500RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D800/500RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 7th Nyquist zone
●The ADC12D800/500RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of -40°C to +85°C.
● Excellent Noise and Linearity up to and Above fIN = 2.7 GHz
● Configurable to Either 1.6/1.0 GSPS Interleaved or 800/500 MSPS Dual ADC
● New DESCLKIQ Mode for High Bandwidth, High Sampling Rate Apps
● Pin-Compatible with ADC1xD1x00
● AutoSync Feature for Multi-Chip Synchronization
● Internally Terminated, Buffered, Differential Analog Inputs
● Interleaved Timing Automatic and Manual Skew Adjust
● Test Patterns at Output for System Debug
● Time Stamp Feature to Capture External Trigger
● Programmable Gain, Offset, and tAD Adjust Feature
● 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
● Key Specifications
● Resolution 12 Bits
● Interleaved 1.6/1.0 GSPS ADCIMD3 (Fin = 2.7GHz @ -13dBFS): -63/-61 dBc (typ)IMD3 (Fin = 2.7GHz @ -16dBFS): -71/-69 dBc (typ)Noise Floor: -152.2/-150.5 dBm/Hz (typ)Noise Power Ratio: 50.4/50.7 dB (typ)Power: 2.50/2.02 W (typ)
● Dual 800/500 MSPS ADC, Fin = 498 MHzENOB: 9.5/9.6 Bits (typ)SNR: 59.7/59.7 dB (typ)SFDR: 71.2/72 dBc (typ)Power per Channel: 1.25/1.01 W (typ)
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