CDCLVP1204EVM Datasheet PDF - TI

●The CDCLVP1204EVM evaluation module is designed to demonstrate the electrical performance of the CDCLVP1204. The CDCLVP1204 is a high performance, low additive phase noise clock buffer. It has two universal input buffers that support either single ended or differential clock inputs, selectable through a control pin. The device also features on chip bias generators that can provide the LVPECL common mode voltage to the device inputs. This fully assembled and factory tested evaluation board allows complete validation of the CDCLVP1204 device functionalities. For optimum performance, the board is equipped with 50ohm SMA connectors and well controlled, 50ohm impedance microstrip transmission lines.

● Easy to use evaluation board to fan out Low phase noise clocks

● Easy device setup

● Fast configuration

● Control pins configurable through jumpers

● Board powered at +2.5-/+3.3V

● single ended or differential input clocks

● CDCLVP1204 supports four LVPECL outputs; CDCLVP1204EVM supports two LVPECL outputs

●This integrated circuit can be damaged by ESD. TI recommends that all integrated circuits be handled with appropriate precautions. Failure to do so can cause damage