CY7C027V-25AC Datasheet PDF - Cypress Semiconductor

●Features

●■ True Dual-Ported memory cells which allow simultaneous access of the same memory location

●■ 32K x 16 organization (CY7C027V/027VN/027AV [1])

●■ 64K x 16 organization (CY7C028V)

●■ 32K x 18 organization (CY7C037V/037AV[2])

●■ 64K x 18 organization (CY7C038V)

●■ 0.35 micron CMOS for optimum speed and power

●■ High speed access: 15, 20, and 25 ns

●■ Low operating power

●■ Active: ICC = 115 mA (typical)

●■ Standby: ISB3 = 10 μA (typical)

●■ Fully asynchronous operation

●■ Automatic power down

●■ Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device

●■ On-chip arbitration logic

●■ Semaphores included to permit software handshaking between ports

●■ INT flag for port-to-port communication

●■ Separate upper-byte and lower-byte control

●■ Dual chip enables

●■ Pin select for Master or Slave

●■ Commercial and Industrial temperature ranges

●■ 100-pin Pb-free TQFP and 100-pin TQFP