LC866528A Datasheet PDF - Sanyo Semiconductor

●Overview

●\- CPU : Operable at a minimum bus cycle time of 0.5µs (microsecond)

●\- On-chip ROM maximum capacity : 48K bytes

●\- On-chip RAM capacity  :  1152 bytes   (LC866548A/40A/32A) : 896 bytes (LC866528A/24A)

●\- VFD automatic display controller/driver

●\- 16-bit timer/counter (or two 8-bit timers)

●\- 16-bit timer/ PWM (or two 8-bit timers)

●\- 8-channels ×8 bit AD Converter

●\- Two 8-bit synchronous serial-interface circuits (1-channel ×16 bit, 1-channel ×8 bit)

●\- 14-source 10-vectored interrupt system

●All of the above functions are fabricated on a single chip.

●Features

●(1) Read Only Memory (ROM)  : LC866548A   49152 ×8 bits

●                                         : LC866540A 40960 ×8 bits

●                                         : LC866532A 32768 ×8 bits

●                                         : LC866528A 28672 ×8 bits

●                                         : LC866524A 24576 ×8 bits

●(2) Random Access Memory (RAM)  :  LC866548A/40A/32A  1152 ×8 bits

●                                                  LC866528A/24A 896 ×8 bits

●(3) Bus Cycle Time / Instruction Cycle Time

●    The bus cycle time indicates the speed to read ROM.

●(4) Ports

●\- Input/output ports  : 3 ports  (16 terminals : port 1, 7, 8)

●Input/output port programmable in a bit

●\- 15V withstand Input/output ports  : 2 ports  (16 terminals)

●Input/output port programmable nibble unit  : 1 port  (8 terminals : port 0)

●(When the N-channel open drain output is selected, the data in a bit can be inputted.)

●Input/output port programmable in a bit  : 1 port  (8 terminals : port 3)

●\- Input port  : 2 ports  (6 terminals : port 7, 8)

●\- VFD output port  : 52 terminals

●Large current output for digit  : 16 terminals

●Pull-down resistor option available

●\- Other function

●Input/output port  : 2 ports  (12 terminals : port F, G)

●Input port  : 3 ports  (24 terminals : port C, D, E)

●(5) VFD automatic display controller

●\- Segment/digit output pattern programmable

●Any segment/digit combination available

●VFD parallel-drive available

●\- 16-step dimmer function available

●(6) AD converter

●\- 8-channels ×8-bit AD converter

●(7) Serial interface

●\- 1-channel ×16-bit serial interface circuits

●\- 1-channel ×8-bit serial interface circuits

●\- LSB first/MSB first function available

●\- Internal 8-bit baud-rate generator in common with two serial interface circuits

●\- SIO automatic transmission available (2-32 byte data can be transmitted with program automatically and

●continuously.) LC866548/40/32/28/24A

●(8) Timers

●\- Timer 0 : 16-bit timer/counter with 2-bit prescaler + 8-bit programmable prescaler

●Mode 0 :   Two 8-bit timers with programmable prescaler

●Mode 1 :   8-bit timer with a programmable prescaler + 8-bit counter

●Mode 2 :   16-bit timer with a programmable prescaler

●Mode 3 : 16-bit counter

●The resolution of Timer is tCYC. (tCYC : cycle time)

●\- Timer 1 : 16-bit timer/PWM with

●Mode 0 : Two 8-bit timers

●Mode 1 :   8-bit timer + 8-bit PWM

●Mode 2 : 16-bit timer

●Mode 3 :   Variable-bit PWM (9-16 bits)

●In Mode 0 and Mode 1, the resolution of Timer and PWM is tCYC.

●In Mode 2 and Mode 3, the resolution of Timer and PWM selectable : tCYCor 1/2tCYC by program

●\- Base timer

●Every 500ms overflow system for a clock application (using 32.768kHz crystal oscillation for Base timer

●clock) Every 976µs, 3.9ms, 15.6ms, 62.5ms overflow system (using 32.768kHz crystal oscillation for Base timer

●clock) The Base timer clock selectable ; 32.768kHz crystal oscillation, System clock, and programmable prescaler

●output of Timer 0

●(9) Buzzer output

●\- The Buzzer sound frequency selectable ; 4kHz, 2kHz (using 32.768kHz crystal oscillation for Base timer clock)

●(10) Remote control receiver circuit (connected to the P73/INT3/T0IN terminal)

●\- Noise rejection function (the time constant of noise rejection filter : 1tCYC/16tCYC/64tCYC) (tCYC : instruction cycle time)

●\- Polarity switching

●(11) Watchdog timer

●\- The watchdog timer is taken on RC outside

●\- Watchdog timer operation selectable : interrupt system, system reset

●(12) Interrupt system

●\- 14-source 10-vectored interrupts :

●1\. External Interrupt INT0 (include watchdog timer)

●2\. External Interrupt INT1

●3\. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)

●4\. External Interrupt INT3, base timer

●5\. Timer/counter T0H (Upper 8 bits)

●6\. Timer T1H / T1L

●7\. Serial interface SIO0

●8\. Serial interface SIO1

●9\. AD converter

●10\. VFD automatic display controller, Port 0

●\- Built-in Interrupt priority control register Microcontroller allows 3 levels of interrupt ; low level, high level, and highest level of multiplex interrupt. It can specify a low level or a high level interrupt priority from INT2/T0L through port 0 (i. e. the above interrupt number from three through ten). It can also specify a low level or the highest level interrupt priority to INT0 and INT1.

●(13) Subroutine stack levels

●\- 128 levels (Max.) : Stack area included in RAM area