MC74HC132ADTR2 Datasheet PDF - ON Semiconductor

Quad 2−Input NAND Gatewith Schmitt−Trigger Inputs

* Output Drive Capability: 10 LSTTL Loads * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 2.0 to 6V * Low Input Current: 1mA * High Noise Immunity Characteristic of CMOS Devices * In Compliance with the Requirements Defined by JEDEC Standard No. 7A * Chip Complexity: 72 FETs or 18 Equivalent Gates * Pb-Free Packages are Available*

NAND Gate 4Element 2IN CMOS 14Pin SOIC Rail

NAND Gate 4Element 2IN CMOS 14Pin TSSOP Rail

NAND Gate 4Element 2IN CMOS 14Pin PDIP Ammo

NAND Gate 4Element 2IN CMOS 14Pin TSSOP T/R

NAND Gate 4Element 2IN CMOS 14Pin PDIP Ammo

NAND Gate 4Element 2IN CMOS 14Pin SOIC N T/R

NAND Gate 4Element 2IN CMOS 14Pin TSSOP T/R