NB3H83905CDR2G Datasheet PDF - ON Semiconductor

●The NB3H83905C is a 1.8 V, 2.5 V Crystal input to 1:6 LVTTL/LVCMOS fanout buffer with outputs powered by a flexible 1.8 V, 2.5 V, or 3.3 V supply (VDD must be greater than VDDO). The core accepts a fundamental Parallel Resonant crystal from 3 MHz to 40 MHz or a Single Ended LVCMOS Clock from 3 MHz to 100 MHz. Core supply must be equal or greater voltage than the output supply.

●Features |   | Benefits

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● 6 LVTTL/LVCMOS Output Clock copies

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● Design Flexibility

● Supply Operation VDD VDDO:

●1.8 V0.2 V, 2.5 V 5% or 3.3 V 5% Core VDD 1.8 V equal or greater than VDD0: 1.8 V, 2.5 V, 3.3 V Nom.

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● Design Flexibility

● Crystal Input Frequency Range: 3 MHz to 40 MHz

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● Design Flexibility

● Clock Input Frequency Range: 3 MHz to 100 MHz

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● Design Flexibility

● Crystal Oscillator Interface

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● LVCMOS compatible Enable Inputs

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● 5 V Tolerant Enable Inputs

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● Tight Output to Output Skew: 80 ps Max

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● Synchronous Output Enable

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● Phase Noise Floor 160 dBc (at 1 MHz)

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● Industrial Temp. Rang

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● 16 Pin TSSOP or SOIC Package

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● PbFree

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