NB3N108K Datasheet PDF - ON Semiconductor

●The NB3N108K is a differential 1:8 Clock and Data fanout buffer with High-speed Current Steering Logic (HCSL) outputs optimized for ultra low propagation delay variation. The NB3N108K is designed with HCSL clock distribution and FBDIMM applications in mind.

●Features |   | Benefits

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● 0.1 ps Typical RMS Phase Jitter

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● Best in class for jitter performance

● Typical Input Clock Frequency 100, 133, 166, or 400 MHz

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● 220 ps Typical Rise and Fall Times

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● 800 ps Typical Propagation Delay

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● tpd 100 ps Maximum Propagation Delay 100 ps Delta tpd Variation Per Each Diff Pair

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● Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V

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● Differential HCSL Output Levels or LVDS Output Levels with Interface Termination

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