NB3W800L Datasheet PDF - ON Semiconductor

●The NB3W800L is a low−power 8−output differential buffer that meets all the performance requirements of the DB800ZL specification. The NB3W800L is capable of distributing the reference clocks for Intel® QuickPath Interconnect (Intel QPI & UPI), PCIe Gen1/Gen2/Gen3/Gen4, SAS, SATA, and Intel Scalable Memory Interconnect (Intel SMI) applications. A fixed, internal feedback path maintains low drift for critical QPI applications.

●Features

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● 8 Differential Clock Output Pairs @ 0.7 V

● Low−power NMOS Push−pull HCSL Compatible Outputs

● Output−to−output Skew <50 ps

● Input−to−output Delay Variation <100 ps

● PCIe Phase Jitter: Gen3 <1.0 ps RMS, Gen4 <0.5ps RMS

● QPI 9.6GT/s 12UI Phase Jitter <0.2 ps RMS

● Individual OE Control; Hardware Control of Each Output

● PLL Configurable for PLL Mode or Bypass Mode (Fanout Operation)

● 100 MHz or 133 MHz PLL Mode Operation; Supports PCIe and QPI & UPI Applications

● Selectable PLL Bandwidth; Minimizes Jitter Peaking in Downstream PLL’s

● Spread Spectrum Compatible; Tracks Input Clock Spreading for Low EMI

● SMBus Programmable Configurations