NDC652P Datasheet PDF - Fairchild

●General Description 

●These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance.These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast high-side switching, and low in-line power lossare needed in a very small

●outline surface mount package.

●Features

●-2.4A, -30V.  RDS(ON)= 0.18W@ VGS= -4.5V

●                 RDS(ON)= 0.11W@ VGS= -10V.

●Proprietary SuperSOT™-6 package design using copper lead frame for superior thermal and electrical capabilities.

●High density cell design for extremely low RDS(ON).

●Exceptional on-resistance and maximum DC current capability.