SN74HCT374PWT Datasheet PDF - TI

●The SN74HCT374PWT is an octal edge-triggered D-type Flip-flop with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs are set to the logic levels that were set up at the data (D) inputs. An OE\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

● High-current 3-state true outputs can drive up to 15 LSTTL loads

● Inputs are TTL-voltage compatible

● Full parallel access for loading

● 80µA Maximum low power consumption

● 22ns Typical tpd

● ±6mA Output drive at 5V

● 1µA Maximum low input current

● Green product and no Sb/Br