74HC564D,653 Datasheet PDF - NXP

●The 74HC564D is an octal D-type Flip-flop with 3-state inverting out-put and positive-edge trigger. This high-speed Si-gate CMOS device is pin compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. It features separate D-type inputs for each flip-flop and inverting 3-state outputs for bus oriented applications. A clock and an OE\ input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the low-to-high CP transition. When OE\ is low, the contents of the 8 flip-flops are available at the outputs. When OE\ is high, the outputs go to the high-impedance OFF-state. Operation of the OE\ input does not affect the state of the flip-flops. It is functionally identical to the 74HC574 but has inverting outputs. It is functionally identical to the 74HC534, but has a different pinning.

● 8-bit positive-edge triggered register

● Common 3-state output enable input

● Independent register and 3-state buffer operation

● Low-power dissipation