GTL2003PW,118 Datasheet PDF - NXP

●The GTL2003PW,118 is a 8-bit bi-directional low Voltage Translator provides high-speed voltage translation with low ON-state resistance and minimal propagation delay. The GTL2003 provides eight NMOS pass transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The device allows bi-directional voltage translations between 0.8 and 5V without use of a direction pin. Voltage translation below 0.8V can be achieved when properly biased. When the Sn or Dn port is low, the clamp is in the ON-state and a low resistance connection exists between the Sn and Dn ports. Assuming the higher voltage is on the Dn port, when the Dn port is high, the voltage on the Sn port is limited to the voltage set by the reference transistor (SREF). When the Sn port is high, the Dn port is pulled to VDD1 by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.

● Supports hot insertion

● Low standby current

● Flow through pinout for ease of printed-circuit board trace routing

● ESD protection exceeds 2000V HBM per JESD22-A114 and 1000V CDM per JESD22-C101

●ESD sensitive device, take proper precaution while handling the device.