$ 149

CDCLVD1212EVM User Reference Manual Guide - TI

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Development Kits

Description:

Clock Buffer Evaluation Module

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Block Diagram onP3P4P5P6

Features Description onP2

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CDCLVD1212EVM Documents

8 Pages / 2.94 MByte

the cdclvd1212 clock buffer distributes one of two selectable clock inputs (in0 in1) to 12 pairs of differential lvds...

LVDS Buffer 0.45V 40Pin VQFN EP T/R

LVDS Buffer 0.45V 40Pin VQFN EP T/R

Clock Buffer Evaluation Module

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