$ 135.837

EPM7192EGI160-20 Programming Manual - Altera

Manufacturer:

Altera

Category:

CPLDs

Case Package:

BPGA-160

Description:

CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 62.5MHz CMOS Technology 5V 160Pin CPGA

Pictures:

3D Model

Symbol

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Pages guide:

Block Diagram onP7P8

Package Outline Dimension onP59P60P61P62P63

Features Description onP3P6

Specifications onP26

Application Area onP66

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EPM7192EGI160-20 Documents

EPM7192EGI160-20 Programming Manual

Altera

66 Pages / 1.45 MByte

EPM7192EGI160-20 Other Datasheet PDF

Altera

18 Pages / 0.47 MByte

EPM7192EGI160-20 Other References

Altera

1 Pages / 0.13 MByte

EPM7192 Documents

EPM7192SQC160-10N Datasheet PDF

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CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 100MHz 5V 160Pin PQFP

EPM7192SQI160-10N Datasheet PDF

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CPLD MAX 7000S Family 3.75K Gates 192 Macro Cells 100MHz CMOS Technology 5V 160Pin PQFP

EPM7192SQC160-15N Datasheet PDF

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CPLD MAX 7000S Family 3.75K Gates 192 Macro Cells 76.9MHz CMOS Technology 5V 160Pin PQFP

EPM7192SQC160-10 Datasheet PDF

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CPLD MAX 7000S Family 3.75K Gates 192 Macro Cells 100MHz CMOS Technology 5V 160Pin PQFP

EPM7192EGC160-12 Datasheet PDF

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CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 90.9MHz 5V 160Pin CPGA

EPM7192SQC160-15 Datasheet PDF

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CPLD MAX 7000S Family 3.75K Gates 192 Macro Cells 100MHz CMOS Technology 5V 160Pin PQFP

EPM7192EGI160-20 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 62.5MHz CMOS Technology 5V 160Pin CPGA

EPM7192SQI160-10 Datasheet PDF

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CPLD MAX 7000S Family 3.75K Gates 192 Macro Cells 100MHz CMOS Technology 5V 160Pin PQFP

EPM7192EQC160-12 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 90.9MHz CMOS Technology 5V 160Pin PQFP

EPM7192EGC160-20 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 62.5MHz 5V 160Pin CPGA

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